Brief's
Vineet Sahula
Associate Professor & Head
Department of Electronics and Communication Engg.,
Malaviya National Institute of Technology Jaipur
JAIPUR- 302 017, INDIA.
Phone: +91-141-2713336 (Off.)
E-mail: sahula [AT#^] ieee.org
Education
- Ph.D. (EE), IIT Delhi
2001 [Supervisors- Prof. C. P. Ravikumar & Prof. D. Nagcoudhuri]
- M. Tech. (Integrated
Electronics & Ckts.), IIT Delhi 1989 [Supervisor- Dr. Navneet Jain,
CARE, IIT Delhi]
- B. Tech. (Electronics), NIT
Jaipur, 1987
Research Interests
- Cognitive Computing &
Architectures
- Nanoscale logic & memory
design
- CAD of VLSI; High level
modeling, design and synthesis of digital and analog systems
- Design process modeling &
analysis
- Graph Theory, B. Tech. (ECE),
3rd Semester, Autumn 2013 (Course link);
Autumn 2012 (Course slides)
- VLSI Physical Design
algorithms, M.Tech. (VLSI Design), Autumn, 2013 (Course link);
Co-instructor Ms Komal Swami
- Mathematical Tools &
Techniques for ECE, Autumn, 2013 (Course link- Simulating RV & Stochastic
Processes; Reliability Theory ), jointly with Prof. V. Sinha, Mr.
Tarun Varma, and Dr. K. K. Sharma
Courses
taught in past
- Special Topics in VLSI, M.
Tech. (VLSI) 3rd Semester, Autumn 2012 (Course slides)
- Memory Design & Testing, M.
Tech. (VLSI) 2nd Semester, Spring 2011
- Computer Arithmetic &
Micro-architecture Design, 6th Semester, B. Tech. (ECE), Spring 2011
- Formal Verification, M.Tech.
(VLSI), 2009
- High level Design & modeling, M. Tech. (VLSI) 2008
- Embedded Systems- HW SW design,
M. Tech. (VLSI) 2006
- Synthesis of Digital systems,
M. Tech. (VLSI) 2008